PURPOSE: To provide a high degree of intergration by a method wherein opening are made on the SiO2 film on p and n-type diffusion layers and, after injection of the same type impurity ions, the openings are stacked with semiconductor layer and wiring layer.
CONSTITUTION: In a CMOS device, openings are made on the SiO2 film on an Si substrate in which source and drain layers have been formed on the p-type and n- type areas. The openings expose p and n-type layers, on which the same type impurity ions are injected respectively to form diffusion layers 5a, 6a. Then, the openings are provided with adition-free polycrystalline Si 11 and Al wiring 1 in double layers. Although Si diffuses into Al, the Si is supplied from the Si layer 11 and therefore the diffusion layers 5, 6 are completely unaffected, thereby providing a good pn-junction property. Even when the openings are shifted from the layers 5, 6, the ion injection layers 5a, 6a formed on the substrate 3 at the locations of the openings prevent short-circuit failures. As such, the process prevents alloy spike, and provides shallow diffusion layers and compactly sized elements.
JPS51137384A | 1976-11-27 | |||
JPS51134566A | 1976-11-22 | |||
JPS51116675A | 1976-10-14 |