Title:
PRINTED WIRING BOARD AND METHOD FOR ELECTROMAGNETIC INTERFERENCE SHIELDING FOR USE THEREIN
Document Type and Number:
Japanese Patent JP3941590
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a printed wiring board wherein signals are transmitted at high speed and radiation noise arising from electromagnetic waves is not propagated to the outside.
SOLUTION: Since a signal wiring pattern 24 is not connected with via holes 26, the value of the characteristic impedance of the signal wiring pattern 24 is matched with that of the input/output impedance of LSI 23. For this reason, even if a signal propagated through the signal wiring pattern 24 is a high-speed signal, such as clock, the signal is not influenced by noise due to capacitive reflection and is transmitted in the accurate phase. The LSI 23 does not malfunction, and operates with accuracy. Further, an electromagnetic interference shielded plate 25 connected with a ground plane 22 is so formed as to cover the signal wiring pattern 24. Therefore, radiation noise due to electromagnetic waves M produced by the signal wiring pattern 24 is absorbed from the electromagnetic interference shielded plate 25 into the ground plane 22 through the via holes 26.
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Inventors:
Tomoichi
Application Number:
JP2002149507A
Publication Date:
July 04, 2007
Filing Date:
May 23, 2002
Export Citation:
Assignee:
NEC
International Classes:
H05K1/02; H05K9/00; H01P3/08; (IPC1-7): H05K1/02; H01P3/08; H05K9/00
Domestic Patent References:
| JP6044170U | ||||
| JP2001007249A | ||||
| JP9214076A | ||||
| JP10013113A | ||||
| JP4003489A | ||||
| JP2001148586A | ||||
| JP7273488A |
Attorney, Agent or Firm:
Seisei Nishimura