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Title:
PROCESSING ARRANGEMENT, MEMORY CARD DEVICE AND METHOD FOR OPERATING AND MANUFACTURING PROCESSING ARRANGEMENT
Document Type and Number:
Japanese Patent JP2007157143
Kind Code:
A
Abstract:

To enable a processing unit to normally operate even when it receives unexpected data from a storage unit.

A processing arrangement includes a processing unit 3 adapted to execute a predetermined set of processing instructions received from an instruction input 12, the set of processing instructions including at least one predetermined processing instruction adapted to initiate a fixing operation in association with a data value received from the instruction input 12; a memory unit 2 with a multiplicity of memory cells 5 adapted to store data values; a detection unit 6 adapted to detect a data value of the memory cell 5; and a data output 7 operationally coupled with the instruction input 12 and adapted to provide, on successful detection, the detected data value of a memory cell 5 or, on unsuccessful detection, a predetermined data value to the data output 7. The predetermined data value is mapped to the predetermined processing instruction adapted to initiate the fixing operation executed through the processing unit 3.


Inventors:
CURATOLO GIACOMO
GILAD OFIR
Application Number:
JP2006323979A
Publication Date:
June 21, 2007
Filing Date:
November 30, 2006
Export Citation:
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Assignee:
QIMONDA FLASH GMBH & CO KG
International Classes:
G06F12/16; G06F9/30; G06F12/00; G06F12/06
Domestic Patent References:
JPS57207952A1982-12-20
Attorney, Agent or Firm:
Kenzo Hara International Patent Office