Title:
PROCESSING METHOD FOR SYNCHRONOUSLY TRANSFERRED DATA, PROCESSING METHOD FOR SCSI SYNCHRONOUSLY TRANSFERRED DATA, SYNCHRONOUSLY TRANSFERRED DATA PROCESSOR AND SCSI PROTOCOL CONTROLLER
Document Type and Number:
Japanese Patent JP3643425
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide an SCSI protocol controller by which design is easy, a development period can be shortened and which can realize high speed transfer.
SOLUTION: First to fourth address control circuit parts 30A-30D are provided for respective memories 29A-29D. A frequency-dividing circuit 30E generates first to fourth synchronous write signals SNW1-SNW4 with first to fourth preset signals PRS1-PRS4 and an internal clock signal CLK from an internal clock generation circuit 30F based on a write signal from an SCSI interface 15. Respective address control circuit parts 30A-30DF write data into the respective memories 29A-29D based on the first to fourth synchronous write signals SNW1-SNW4.
Inventors:
Nobuhiro Taki
Application Number:
JP4293596A
Publication Date:
April 27, 2005
Filing Date:
February 29, 1996
Export Citation:
Assignee:
富士通株式会社
富士通ヴィエルエスアイ株式会社
富士通ヴィエルエスアイ株式会社
International Classes:
G06F13/38; (IPC1-7): G06F13/38
Domestic Patent References:
| JP7200384A | ||||
| JP6149734A |
Attorney, Agent or Firm:
Hironobu Onda
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