Title:
PROCESSOR AND DATA SHARING DEVICE
Document Type and Number:
Japanese Patent JP2004287481
Kind Code:
A
Abstract:
To provide a memory sharing device for sharing memory data with extremely simple constitution in processors with different endians.
The first processor 10 and the second processor 20 having different endians are connected to a memory through a data bus in byte order by the endian of the first processor 10, and an address conversion part 21 is provided for converting the lower bit of an address to indicate the reversed position of a data position in the data bus, and outputting it to the memory when the second processor 20 accesses the shared memory on data smaller in width than the data bus.
Inventors:
FUNAHASHI KAZUTOSHI
NAGAYASU MASARU
IGAWA SATOSHI
NAGAYASU MASARU
IGAWA SATOSHI
Application Number:
JP2003075198A
Publication Date:
October 14, 2004
Filing Date:
March 19, 2003
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F12/04; G06F5/00; G06F7/00; G06F12/02; G06F13/40; G06F15/16; (IPC1-7): G06F12/04; G06F5/00
Attorney, Agent or Firm:
Hiromori Arai