Title:
PRODUCTION OF MOS SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS53129980
Kind Code:
A
Abstract:
PURPOSE: To elimiante the variations in the threshold voltages of MOS semiconductor devices of diffusion self-alignment structure, avert the increase in contact area and improve the scale of integration by combining a diffusion method and ion implantation method thereby eliminating the defects of both.
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Inventors:
HORINO NOZOMI
SAKAI YOSHIO
SAKAI YOSHIO
Application Number:
JP4446177A
Publication Date:
November 13, 1978
Filing Date:
April 20, 1977
Export Citation:
Assignee:
HITACHI LTD
International Classes:
H01L29/78; H01L21/22; H01L21/265; H01L29/06; (IPC1-7): H01L21/22; H01L21/265; H01L29/06; H01L29/78