Title:
PROGRAMMABLE DAMPING CIRCUIT
Document Type and Number:
Japanese Patent JPH07321647
Kind Code:
A
Abstract:
PURPOSE: To make it possible to program a damping factor by adding equivalent voltage to capacitor voltage and simulating resistance in a damping means for an A type phase detector and controlling the effective resistance of a loop filter by a variable gain amplifier in the case of a B type phase detector. CONSTITUTION: An input signal Fin 701 and a signal VCOin 709 are inputted and sent to a block 802 consisting of a flip flop(FF) and a logic and a pump up signal 803 and a pump down signal 804 are supplied to control switches 806, 808. The signal 803 controls a switch 904, the signal 804 controls a switch 905, a current source 805 is connected/separated to/from a node 807 by the switch 806, and a current source 809 is connected/separated to/from the node 807 by the switch 808. The node 807 is connected to a filter 901 and a node 902 is grounded through a capacitor Cl and connected to an additional node 903. A voltage source +Veff 906 is connected/separated to/from a node 908 by a switch 904.
Inventors:
TSUUWAN PAN
JIENNGAN CHIYAAN
JIENNGAN CHIYAAN
Application Number:
JP11070395A
Publication Date:
December 08, 1995
Filing Date:
May 09, 1995
Export Citation:
Assignee:
SILICON SYSTEMS INC
International Classes:
H03L7/093; H03L7/089; H03L7/107; (IPC1-7): H03L7/093
Attorney, Agent or Firm:
Shinichiro Nanjo
Previous Patent: Railway vehicle traverser with bogie loading/unloading mechanism
Next Patent: LOCK DETECTOR FOR PLL CIRCUIT
Next Patent: LOCK DETECTOR FOR PLL CIRCUIT