To mechanically increase the number of counts by time-dividedly transferring counter data of prescribed timing from a memory storing counter data of all timing.

When a clock CLK3 generated by a clock generating circuit is applied to an output circuit 2, the circuit 2 transfers a pulse signal P0 sampled by a sampling circuit 1 to a counter 3, which counts the signal P0. When a count value reading request is outputted, a count value is sent to a reading circuit 6 at the input timing of the clock CLK3 to a gate circuit 5. When a clock CLK4 generated from the circuit 7 is applied to a memory 4, the count value of the counter 3 is transferred to a count value storing area for counter data corresponding to a counter number in the memory 4. When a clock CLK5 is applied to the counter 3, the count value is transferred to a status flag storing area for the counter data corresponding to the counter number in the memory 4.