To provide a PWM signal generator which facilitates the improvement of the responsiveness of a PWM signal to a control object power supply by the proper control of the maximum value of the PWM signal.

In the case of, for instance a signal PWM1, the registered value (the on-width value of the signal PWM1) of a latch 3 is added to the inverse value of the registered value (the maximum value of the on width of the signal PWM1) of a latch 1 by an adder and, if there is a carry in the result, a level H is set in a predetermined D latch and, if not, a level L is set in the D latch. Once the level of the Q output of the D latch becomes H, the level of one of the inputs of the AND of a composite gate 35 becomes H, and the level of one of the inputs of the AND of a composite gate 47 becomes L. When next signals CHG10N and PM10NS are inputted, the registered value of the latch 1, i.e., the maximum value of the on-width of the signal PWM1, is outputted on a bus 65, instead of the registered value of the latch 3.