PURPOSE: To simultaneously select plural memory cells, write the same data in the memory cells and confirm the writing by providing the titled circuit with a multiplex reading circuit.

CONSTITUTION: In case of writing logic '0' in a memory cell Cij, a word line multiplex selecting signal MW and a digit line multiplex selecting signal MD are turned to a high level. Then, a read control signal RW is turned to a low level to prevent transistors (TRs) QRW, QRW' from being turned on, the digit lines D are turned to a level sufficiently lower than that of a word line selecting signal Wsi and then higher than the Wsi. Thereby, TRs Qcij are turned off and TRs Qcij' are turned on to all the cells. A multiplex read control signal MR is turned to the high level and the digit lines D, -D are turned to the low level to end writing. Consequently, the same data can be written in all the cells without applying address signals from the external.