Title:
RE-CONSTRUCTIBLE COUNTER AND PULSE DURATION MODULATOR USING IT
Document Type and Number:
Japanese Patent JPH0884079
Kind Code:
A
Abstract:
PURPOSE: To provide a reconstructible counter which has a small circuit area and does not consume much electric power and a pulse width modulator. CONSTITUTION: A pulse width modulator 20 incorporates a reconstructible counter 30 the width of which is decided by a mode control bit. A decoder 25 supplies a width control signal obtained by decoding the mode control bit to the counter 30. The width control signal enables a selected lowest-order counter cell of the counter 30 in the form of a binary thermometal. Non-used counter cells are disabled so as to reduce electric power. The pulse width modulator 20 also incorporates an output circuit 25 and supplies a pulse width-modulated output signal having a duty cycle which is decided by a certain rate in one cycle of the counter 30.
More Like This:
Inventors:
YAIA OOBAKU
HAINRITSUKU IOSABU
EFUI ORAIAN
HAINRITSUKU IOSABU
EFUI ORAIAN
Application Number:
JP4129495A
Publication Date:
March 26, 1996
Filing Date:
February 06, 1995
Export Citation:
Assignee:
MOTOROLA INC
International Classes:
G06F1/025; H03K7/08; H03K21/38; H03K23/66; H03M1/82; (IPC1-7): H03M1/82; H03K7/08; H03K21/38
Attorney, Agent or Firm:
池内 義明
Next Patent: BINARY SELECTION ENCODER