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Title:
受信装置、それを用いた通信システム、およびサンプリングレート変換手段
Document Type and Number:
Japanese Patent JP3842269
Kind Code:
B2
Abstract:
In a transmitting/receiving apparatus (6) of a transmitting side, a signal from an input terminal (Ti) is inputted to a delta sigma modulator circuit (42), delta-sigma modulated thereby, thereafter packet-divided by a transmitter (12), and then transmitted, as digital signals (S3), to a network (2). On the other hand, the transmitting/receiving apparatus (6) serving as a receiving side includes a clock signal producing circuit (22) that is independent of the network (2). The sampling rate of a data sequence (S21) from a receiver (21) is converted, by a sampling rate converter (23), to a period designated by the clock signal producing circuit (22), and thereafter amplified and demodulated by a digital switching amplifier having the delta sigma modulator circuit (42).

Inventors:
Masashi Takahashi
Yuji Ichikawa
Application Number:
JP2003568782A
Publication Date:
November 08, 2006
Filing Date:
December 26, 2002
Export Citation:
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Assignee:
Sharp Corporation
International Classes:
H04L25/40; G10L19/00; H03M3/02; H04B14/06
Domestic Patent References:
JP4035111A
JP6104833A
JP10233687A
Attorney, Agent or Firm:
Kenzo Hara International Patent Office
Kenzo Hara
Ryuichi Kijima
Ichiro Kaneko