PURPOSE: To output a data with 0 and 1 level discriminated therefrom by providing a function transferring a sampled data after majority decision through the adoption of a sampling clock sampling the input data at high speed.

CONSTITUTION: A line receiver 1 outputs a data sent from a data link to a D input terminal of a flip-flop 3. Simultaneously, an oscillator 2 oscillates a clock being an odd number of multiple of the line clock and gives an output to a C input terminal of the flip-flop 3 and a frequency divider 4. The data sampled by the flip-flop 3 is subject to majority decision as to whether 1s or 0s are of a majority level at a period of a clock frequency-divided into the clock rate of the line at the frequency divider 4 in a majority decision discrimination section 5. Then the discriminated data is given to the succeeding data link via a line driver 6. Moreover, the clock subject to frequency division by the frequency divider 4 is given to the succeeding data link via a line driver 7.