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Title:
RECEIVER
Document Type and Number:
Japanese Patent JP3715486
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To provide a receiver that reduces the current consumption, enhances the communication speed with an inexpensive configuration of a reduced circuit scale and prevents malfunction due to a steady-state noise at the same time.
SOLUTION: A transistor detection circuit 15 provided with a transistor(TR) 15a receives a reception signal by a reception antenna 13 through a preamplifier circuit 14 employing a TR 14a for its amplifier element. A base band amplifier circuit 16 whose amplifier element is a TR 16a receives a detected output of the transistor (TR) detection circuit 15 through a coupling capacitor 24 and gives its amplified output to a comparator circuit that extracts code information from the received signal. TRs with high transition frequency are adopted for the TRs 14a, 16a, which obtain a gain of about 30 dB or over for a frequency band where the carrier frequency of the received signal is in the order of 100 kHz even when a collector current is set to be several microamperes.


Inventors:
Nagai Shinka
Takahide Kitahara
Hiroki Okada
Application Number:
JP32567899A
Publication Date:
November 09, 2005
Filing Date:
November 16, 1999
Export Citation:
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Assignee:
株式会社デンソー
トヨタ自動車株式会社
International Classes:
B60R11/02; E05B83/36; H03D1/18; H04B1/16; H04B5/00; H04B5/02; H04Q9/00; H04Q9/14; E05B49/00; (IPC1-7): H04B5/02; B60R11/02; E05B49/00; E05B65/20; H03D1/18; H04B1/16; H04Q9/00; H04Q9/14
Domestic Patent References:
JP7193532A
JP7110851A
JP8097226A
JP9045976A
JP8321797A
JP11131884A
Attorney, Agent or Firm:
Tsuyoshi Sato