PURPOSE: To operate the sample-and-hold operation with high accuracy by providing a means applying a potential of an input signal to a hold capacitor, transistors(TRs) in emitter follower operation, an amplifier and a means supplying a base current to the TRs to the sample-and-hold circuit.
CONSTITUTION: When a clock signal 14 is at an H level and an inverted clock signal 12 is at an L level, an input level of an analog signal charges up a hold capacitor 11. Since a current of a constant current source 344 of a differential amplifier 301 flows to a TR 341, an emitter current of a TR 215 and an emitter current of a 341 in a leakage current compensation circuit 201 are made equal to each other. The current 14 is supplied to a current mirror circuit, then a current 15 nearly equal to the current 14 is outputted to a terminal 241 and fed to a base of the TR 341. As a result, a leakage current from a capacitor 11 by a base current of the TR 341 is compensated by a current from the circuit 201 and then the sample-and-hold circuit is operated with high accuracy.
UEDA GORO
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