Title:
SCANNING CIRCUIT
Document Type and Number:
Japanese Patent JP2669759
Kind Code:
B2
Abstract:
PURPOSE: To provide a scanning circuit whose operating speed is limited only by the operating speed of a switching transistor and without generating even crosstalk.
CONSTITUTION: This circuit is provided with half-bit shift registers 141, 142, 143,... which output a start pulse V'1 by shifting by every half cycle of a clock &phiv '1 sequentially as n(n: integer ≥1) pulses, and (n×m) switching transistors 171, 172, 173,... whose every two control terminals are connected in common, and commonly connected control terminals are connected to the output terminals of the half-bit shift registers 141, 142, 143,..., respectively, and to the input terminals of every four of which four kinds of external pulses V'P1-V'P4 are inputted, and output the four kinds of external pulses V'P1-V'P4 from the output terminals as (n×m) scanning pulses V'O1, V'O2, V'O3,..., respectively.
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Inventors:
Hideki Asada
Application Number:
JP1774593A
Publication Date:
October 29, 1997
Filing Date:
February 04, 1993
Export Citation:
Assignee:
GTC Inc.
International Classes:
G02F1/133; G09G3/36; (IPC1-7): G09G3/36; G02F1/133
Attorney, Agent or Firm:
Masatake Shiga (2 outside)