Title:
SCANNING LINE CONTROL CIRCUIT, AND IMAGE DISPLAY DEVICE
Document Type and Number:
Japanese Patent JP2014145861
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To suppress degradation of display quality.SOLUTION: An image display device is provided with a first transistor which has: a gate connected to a signal line to which a clock signal is inputted; a drain connected to a first scanning line for supplying a pixel with a signal; and a source connected to a second scanning line. The first transistor lowers a potential of the drain to a prescribed value when a signal is supplied for the first scanning line and the clock signal is inputted to a signal line; it further lowers the potential of the drain when supply of signals for the first scanning line in the state that the clock signal is inputted to the signal line.
Inventors:
ICHIMURA TERUHIKO
Application Number:
JP2013013607A
Publication Date:
August 14, 2014
Filing Date:
January 28, 2013
Export Citation:
Assignee:
KYOCERA CORP
International Classes:
G09G3/20; G02F1/133; G09G3/30; G09G3/36; H01L51/50
Attorney, Agent or Firm:
Hiroaki Sakai
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