Title:
SEMICONDUCTOR AMPLIFICATION DEVICE
Document Type and Number:
Japanese Patent JP2016197828
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor amplification device capable of reducing influences of an output bias circuit connected with the exterior, and suppressing a double wave.SOLUTION: A semiconductor amplification device has a semiconductor amplification element, an output terminal, a bonding wire, a transmission line group, and a short stub circuit. The semiconductor amplification element has an input electrode and an output electrode. The transmission line group includes a plurality of transmission lines. The plurality of transmission lines at least has a first transmission line having a first electric length equal to or less than 90° at an upper limit frequency in a band, and a second transmission line having a second electric length equal to or less than 90° at the central frequency in the band. A characteristic impedance of the second transmission line is higher than that of the first transmission line. The short stub has a capacitor, and a third transmission line having a third electric length of about 90° at the central frequency. One end part of the third transmission line is connected with the second transmission line at a position where the electric length at the central frequency becomes about 45°, toward the output terminal side.SELECTED DRAWING: Figure 1
Inventors:
TAKAGI KAZUTAKA
Application Number:
JP2015077419A
Publication Date:
November 24, 2016
Filing Date:
April 06, 2015
Export Citation:
Assignee:
TOSHIBA CORP
International Classes:
H03F3/60
Domestic Patent References:
| JP2013187774A | 2013-09-19 | |||
| JPH0738350A | 1995-02-07 |
Foreign References:
| EP2262107A1 | 2010-12-15 |
Attorney, Agent or Firm:
Masahiko Hinataji