To provide a high integration semiconductor device in which breakdown strength of a high breakdown strength PMOS transistor is ensured.
The semiconductor device comprises an N type transistor 4 having a first gate 18, an N type lightly doped diffusion layer 36 formed around the first gate, an N type heavily doped diffusion layer 6 formed around the N type lightly doped diffusion layer, and first gate sidewalls 29, 47 and 82 formed around the first gate, and a P type transistor 3 having a second gate 13, a P type lightly doped diffusion layer 35 formed around the second gate, a P type heavily doped diffusion layer 11 formed around the P type lightly doped diffusion layer, and second gate sidewalls 10, 29 and 82 formed around the gate wherein the P type lightly doped diffusion layer extends farther downward of the second gate than the N type lightly doped diffusion layer extending downward of the first gate.
NARUGE KIYOMI
MASUDA KAZUNORI
