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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JP2000323718
Kind Code:
A
Abstract:

To provide the semiconductor layer which can be improved in dielectric strength increasing the ON resistance, and its manufacture.

This semiconductor device has a p type well region 4 and an n+ drain region 2 isolated and formed in an n type semiconductor layer 1 on an insulating layer 11 and an n+ source region 3 formed in the p type well region 4. The p type well region 4 is formed deep reaching the insulating layer 11 from the top surface of the n type semiconductor layer 1. A source electrode 8 is formed over the n+ type source region 3 and the p+ type base contact region 9 in the p type well region 4. A connection layer 13 with low resistance which connects the position of the p type well region 4 connected to the source electrode 8 and the position right below the gate insulating film 5 below the gate insulating film 6 is provided at part of the insulating layer 11. The connection layer 13 is formed in the insulating layer 11 on the interface side for the p type well region 4.


Inventors:
SUZUKI YUJI
SUZUMURA MASAHIKO
HAYAZAKI YOSHIKI
SHIRAI YOSHIFUMI
KISHIDA TAKASHI
TAKANO MASAMICHI
YOSHIDA TAKESHI
Application Number:
JP13469299A
Publication Date:
November 24, 2000
Filing Date:
May 14, 1999
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC WORKS LTD
International Classes:
H01L21/336; H01L29/786; (IPC1-7): H01L29/786; H01L21/336
Attorney, Agent or Firm:
Keisei Nishikawa (1 person outside)