SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR

Japanese Patent JP3715502

B2

PROBLEM TO BE SOLVED: To form a passive element and a shield layer between the wiring layers of a multilayer wiring, where metal is embedded and to avoid cross talk with an active element formed on the upper face of a semiconductor substrate.
SOLUTION: Passive elements, such as a capacitor, a resistor and an inductor, are formed on an upper wiring layer constituting the Cu wiring of multiple layers. A shield layer blocking electric and magnetic connection with the passive elements is formed in the lower wiring layer of the passive elements. Thus, the active element of a transistor can be arranged on the semiconductor substrate directory below the passive elements having a large occupying area without crosstalks. Thus, the degree of integration of the semiconductor device is improved markedly. At formation of the CU embedded multilayer wiring, the antireflection film of SiON and the like is used in common with a contact hole and the opening of a wiring groove. Thus, a highly reliable semiconductor device, which avoids generation of crowns at the peripheral part of the contact hole and has high yield and less man-hours, can be provided.

Takashi Yoshitomi
Ryoji Hasumi
Masahiro Inohara

JP2000070937A

November 09, 2005

March 14, 2000

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Toshiba Corporation

H01L23/52; H01L21/3205; H01L21/768; H01L21/822; H01L23/522; H01L27/04; (IPC1-7): H01L21/3205; H01L21/768; H01L21/822; H01L27/04

Takehiko Suzue
Sadao Muramatsu
Atsushi Tsuboi
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Shoji Kawai

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