Title:
SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP2009060002
Kind Code:
A
Abstract:
To increase the deflective strength of a silicon substrate with the underside thereof ground or polished.
The underside of a semiconductor wafer 21 is appropriately ground or polished. After the process, a damaged layer is formed on the underside of the semiconductor wafer 21 due to the grinding or polishing. Thereafter, the damaged layer formed on the underside of the semiconductor wafer 21 is removed by dry etching. This increases the deflective strength of the semiconductor silicon substrate that is obtained by dicing the semiconductor wafer 21.
Inventors:
KIZAKI MASAYASU
AOKI NOBUO
AOKI NOBUO
Application Number:
JP2007227563A
Publication Date:
March 19, 2009
Filing Date:
September 03, 2007
Export Citation:
Assignee:
CASIO COMPUTER CO LTD
International Classes:
H01L21/304; H01L21/3065; H01L23/12
Domestic Patent References:
| JP2000124177A | 2000-04-28 |