To improve performance of a semiconductor device in which a metal silicide layer is formed by a salicide process.

MISFETs containing a gate electrode GE and a source/drain region in which a metal silicide layer 11b is formed on an upper part are formed by a plurality of numbers on a main surface of a semiconductor substrate 1. The metal silicide layer 11b consists of a first metal element consisting of at least one kind selected from among Pt, Pd, V, Er, and Yb as well as nickel silicide. The particle size of the metal silicide layer 11b is smaller than a width W1c in a gate length direction in the source/drain region arranged between adjoining gate electrodes GE, being closest to each other in the gate length direction, among a plurality of source/drain regions of MISFETs formed on the main surface of the semiconductor substrate 1.