SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE

Japanese Patent JP2022170890

A

To realize a high-performance semiconductor device with excellent operational stability.SOLUTION: In a plan view, gate wiring 21 extending in a direction D2 in which a group of gate electrodes 20 is orthogonal to a connecting direction D1 is arranged on one side in the direction D1 of a transistor unit 2 including the group of gate electrodes 20, a group of source electrodes 30, and a group of drain electrodes 40 extending in the direction D1. In a plan view, on the other side of the transistor unit 2 in the direction D1, source wiring 31 in which the group of source electrodes 30 extends in the connection direction D2, and drain wiring 41 in which the group of drain electrodes 40 extends in the connection direction D2 with bridge wiring 42 straddling the source wiring 31 are arranged. The source wiring 31 is connected to a GND via 34 provided on the direction D2 side of the transistor unit 2 in a plan view. With this layout, it is possible to shorten the interval between the gate electrodes 20, and the shortened interval reduces the phase difference of the transistor unit 2 to suppress oscillation and improve the operational stability of a semiconductor device 1A.SELECTED DRAWING: Figure 10

JPH04188635	MANUFACTURE OF SEMICONDUCTOR DEVICE
JPS6263423	MANUFACTURE OF GAAS INTEGRATED CIRCUIT
JP2000223420	MANUFACTURE OF SEMICONDUCTOR SUBSTRATE

KURAHASHI NAOKO

JP2021077169A

November 11, 2022

April 30, 2021

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FUJITSU LTD

H01L21/338; H01L21/3205; H01L21/336; H01L21/768; H01L29/41

Patent Attorney Corporation Fuso International Patent Office

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