To provide a technique capable of improving reliability of a semiconductor device.

The semiconductor device has: an interposer 2A; and chips CP1 and CP2 provided on the interposer 2A. The interposer 2A has: a plurality of columnar conductors 10 which extend in a direction of a thickness thereof and are electrically insulated to one another; and a wiring layer 11 interposing the chips CP1 and CP2, and the plurality of columnar conductors 10; wherein air gaps 13 are formed between the plurality of columnar conductors 10 and open to the outside, and respective side faces of the plurality of columnar conductors 10 are covered with insulating films 12.