Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE MOUNTING STRUCTURE, METHOD OF MANUFACTURING SAME, AND METHOD OF PEELING SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2009021465
Kind Code:
A
Abstract:

To provide: a semiconductor device mounting structure excellent in shock resistance and mass-productivity and easy to repair and rework, and in which no residue, such as adhesive, remains on a circuit substrate after repair and stress during the period of repair is suppressed as small as possible; a method of manufacturing the same; and a method of peeling a semiconductor device.

There is provided a circuit substrate 13 having a semiconductor device 11 on one of main surfaces, that is, a main surface 11a, of which, electrode parts 11b are arrayed, and substrate electrode parts 13a to be connected electrically with the electrode parts 11b of the semiconductor device 11 by solder bumps 12, in which at least a part of a side surface 11c of the semiconductor 11 and the circuit substrate 13 are adhered and fixed by a curing resin 14 and thermal expansive particles 15 are mixed in at least part of a surface boundary region 14a between the curing resin 14 and the circuit substrate 13.


Inventors:
YOSHIDA HISAHIKO
Application Number:
JP2007183969A
Publication Date:
January 29, 2009
Filing Date:
July 13, 2007
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
PANASONIC CORP
International Classes:
H01L23/29; H01L21/56; H01L21/60; H01L23/31
Attorney, Agent or Firm:
Fumio Iwahashi
Hiroki Naito
Daisuke Nagano