Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3859340
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To prevent the increase in reflection loss, through impedance non- matching and to prevent parasitic oscillation.
SOLUTION: A high frequency semiconductor chip 1 is provided with high frequency transmission lines L7a, and L7b of one surface and a ground conductor 5 of the other surface and a semiconductor package 8 is provided with the ground conductor 9 of one surface and the high frequency transmission lines L13a and L13b of the other surface. For this semiconductor device, the high frequency semiconductor chip 1 is loaded on the semiconductor package 8 and slots 4a, 10a, 4b and 10b are formed at the ground conductors 5 and 9 so as to respectively face each other and to face the high frequency transmission lines L7a, L13a, L7b and L13b and are electromagnetically connected between the high frequency transmission lines L7a and L13a and between the high frequency transmission lines L7b and L13b. Also, Ni conductors are formed on the ground conductor 5 which is positioned at the peripheral part of the slots 4a and 4b or the Ni conductors are formed on the ground conductor 9 positioned at the peripheral part of the slots 10a and 10b.
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Inventors:
Yoshihiro Notani
Application Number:
JP108298A
Publication Date:
December 20, 2006
Filing Date:
January 06, 1998
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H01L23/12; H01L21/338; H01L23/66; H01L29/812; H01P3/08; H01P5/02; H01P5/08; (IPC1-7): H01L23/12; H01L29/812; H01L21/338; H01P3/08; H01P5/02; H01P5/08
Domestic Patent References:
| JP7202522A | ||||
| JP7202520A | ||||
| JP6077729A | ||||
| JP9293826A | ||||
| JP9186268A | ||||
| JP61057605U |
Attorney, Agent or Firm:
Aoyama Aoi
Masahiro Ishino
Masahiro Ishino
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