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Title:
半導体装置
Document Type and Number:
Japanese Patent JP6999233
Kind Code:
B2
Abstract:
To obtain a semiconductor device improved in reliability by hindering a discharge phenomenon between a semiconductor chip and a dicing mark during present of a dicing region.SOLUTION: In a polyimide film 11 of a semiconductor chip 10, in a case where a TEG 2 is provided in any of dicing regions 4a - 4d, the width of the polyimide film 11 of a mark adjacent side, which is adjacent to the TEG 2, of four sides is greater than the width of at least one non-adjacent side, which is not the mark adjacent side of the four side. Thus, the right side and the lower side of the semiconductor chip 10 are mark adjacent sides whereas at least one of the upper side and the left side of the semiconductor chip 10 is a non-adjacent side. Accordingly, the respective widths W2 of the polyimide film 11 on the right side and the lower side of the semiconductor chip 10 are set wider than the widths W1 of the polyimide film 1 on the upper side and the left side of the semiconductor chip 10.SELECTED DRAWING: Figure 1

Inventors:
Yasunori Oritsuki
Juichi Tanioka
Yukifumi Okuno
▲濱▼野 健一
Yoichiro Tarui
Yoshinori Matsuno
Application Number:
JP2018052044A
Publication Date:
January 18, 2022
Filing Date:
March 20, 2018
Export Citation:
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Assignee:
Mitsubishi Electric Corporation
International Classes:
H01L21/301; H01L21/336; H01L21/66; H01L29/12; H01L29/739; H01L29/78; H01L29/861; H01L29/868; H01L29/872
Domestic Patent References:
JP2017098345A
JP2016134427A
JP2015106693A
JP2003332270A
JP2001305717A
JP2009164521A
JP7099147A
JP2003140317A
JP2011232700A
JP2135343A
JP2008028243A
JP8222509A
JP2014154609A
JP2015220334A
Attorney, Agent or Firm:
Hidetoshi Yoshitake
Takahiro Arita