Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5518056
Kind Code:
A
Abstract:
PURPOSE:To eliminate the allowance for forming openings at both lower electrode wirings with a substrate in a semiconductor device by forming self-alignment holes insulated from a pair of electrode wirings of anodizable metals extending in parallel with each other. CONSTITUTION:An insulating film 102 is formed on a semiconductor substrate 101, and diffusion masks 103, 104 are further formed thereon the thereby form impurity diffusion regions 105, 106 in the substrate 101. Then, the mask films 103, 104 are removed to thereby form anodizable metal such as aluminum electrodes 107, 108 and to then anodize the peripheral surface of the electrodes 107, 108, which are then coated with non-porous alumina layers 109, 110. Then, phosphorus glass layer 111 are formed further on the surface over the layers 109, 110, and a photoresist film 112 is formed on the surface of the layer 111. An opening parttern 113 is provided on the film 112 to thereby chemically selectively etch through the openibg. Thus, a self-alignment hole insulated from a pair of electrode wirings 107, 108 of aluminum is perforated through an insulating film 114 on the surface of the substrate 101 to thereby electrically connect the upper layer wiring 115 to the surface of the substrate 101.
Inventors:
WADA TOSHIO
Application Number:
JP9109078A
Publication Date:
February 07, 1980
Filing Date:
July 25, 1978
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L23/522; H01L21/28; H01L21/768; H01L29/43; (IPC1-7): H01L21/88
Domestic Patent References:
| JPS5353254A | 1978-05-15 | |||
| JPS5011236A | 1975-02-05 |