Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5737855
Kind Code:
A
Abstract:
PURPOSE:To prevent the stage breaking of Al wiring by a method wherein a source, a drain and a poly Si-gate are formed, an insulating film is deposited and etched vertically, and an electrode window is shaped leaving SiO2 at the end section of poly-Si. CONSTITUTION:A field oxide film 32 and a gate oxide film 33 are shaped to an N type Si substrate 31, and gates and wiring 35 by poly-Si are formed selectively. SiO2 36 is formed on the surface of the poly-Si, ions are injected and the P type source and the drain 40 are molded. The surface is coated with PSG 38, the PSG is heated and the stage sections 39 of the poly-Si are smoothed. The end edges 39 of the poly-Si are coated with a resist mask, crossing the P layer and the poly-Si, the mask and the wiring and the like are etched by reactive ions by using CF4, and connecting windows are formed approximately vertical. Since SiO2 41 remains at the end sections 37 of the wiring 35 at that time, the stage is not broken when Al layers 44 are shaped successively, and the reliability of the device is improved.
Inventors:
ITOU HIROSHI
Application Number:
JP11386780A
Publication Date:
March 02, 1982
Filing Date:
August 19, 1980
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L29/78; H01L21/768; H01L23/522; (IPC1-7): H01L29/78
Domestic Patent References:
| JPS52141591A | 1977-11-25 | |||
| JPS54142981A | 1979-11-07 |