Title:
半導体装置及び半導体装置の製造方法
Document Type and Number:
Japanese Patent JP6918154
Kind Code:
B2
Abstract:
A semiconductor device includes: a drift layer of a first conductivity type which is made of silicon carbide; a junction region formed on one main surface of the drift layer; a junction termination extended region of the drift layer, the junction termination extended region being formed outside the junction region when the one main surface is viewed in plan view, and the junction termination extended region containing an impurity of a second conductivity type opposite to the first conductivity type; and a guard ring region of the drift layer, the guard ring region being formed at a position overlapping the junction termination extended region when the one main surface is viewed in plan view, and the guard ring region containing the impurity of the second conductivity type with a concentration that is higher than that of the junction termination extended region, wherein in the junction termination extended region, the concentration of the impurity of the second conductivity type in a depth direction from the one main surface increases from the one main surface down to a first depth, and the concentration of the impurity of the second conductivity type at the one main surface is one tenth or less the concentration of the impurity of the second conductivity type at the first depth and is higher than a concentration of an impurity of the first conductivity type of the drift layer.
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Inventors:
Akihiko Shibukawa
Yusuke Maeyama
Shunichi Nakamura
Yusuke Maeyama
Shunichi Nakamura
Application Number:
JP2019571842A
Publication Date:
August 11, 2021
Filing Date:
February 13, 2018
Export Citation:
Assignee:
Shindengen Industry Co., Ltd.
International Classes:
H01L29/06; H01L21/329; H01L29/12; H01L29/739; H01L29/78; H01L29/872
Foreign References:
| WO2015033463A1 | ||||
| WO2014184839A1 |
Attorney, Agent or Firm:
Sumio Tanai
Yasushi Matsunuma
Toshio Komuro
Yasushi Matsunuma
Toshio Komuro