PURPOSE: To stabilize the action of, for example, a writing pulse generating circuit by surely converting the signal level of an internal signal to prescribed signal level by means of a level converting circuit.
CONSTITUTION: An inverted clock signal CP is made into an emitter coupled logic ECL level, it is made to have a small pulse width along the action limit of an ECL logic circuit, and a writing pulse generating circuit WPG is composed of a CMOS logic circuit. For such a reason, in a memory having a logic function, first, the inverted clock signal CP is inputted to a pulse widening circuit PWE, the falling is delayed by a prescribed delaying time tb, and simultaneously, the pulse width is made into a pulse width tw2 in which the level converting action of a level converting circuit LC can be stably executed. Thus, the level converting action by the level converting circuit LC can be stably executed, and the action of the writing pulse generating circuit WPG of a timing generating circuit TG can be stabilized.
MIYAOKA SHUICHI
NAKAMURA KAZUO
