Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS61181139
Kind Code:
A
Abstract:
PURPOSE:To investigate the state of the inside of a semiconductor integrated circuit at a step before a wafer is divided without increasing the area of a semiconductor integrated circuit chip by connecting one part of a wiring for the circuit on the wafer to an electrode terminal for an adjacent semiconductor integrated circuit. CONSTITUTION:Exclusive electrode terminals 3 and common electrode terminals 5 for a semiconductor integrated circuit under a test are given power supplies and inputs from a semiconductor test apparatus, etc. according to each function, and outputs are decided. When the common electrode terminals 5 for the semiconductor integrated circuit under the test are given inputs from a driving circuit having low-output impedance at that time, the common electrode terminals 5 for the semiconductor integrated circuit under the test are given anticipated input waveforms even hen the electrodes 5 are connected by internal potential leading-out wirings 7 because the output impedance of leading-out output buffer circuits 6 for an adjacent semiconductor integrated circuit is high. The state of the inside of the semiconductor integrated circuit under the test is outputted to common electrode terminals 5 for the adjacent semiconductor integrated circuit through the leading-out output buffer circuits 6 and the internal potential leading-out wirings 7. The internal potential leading-out wirings 7 are cut under the state after scribing a wafer, and the common electrode terminals 5 function as normal electrode terminals for inputs.
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Inventors:
ISHII TOSHIO
Application Number:
JP2110285A
Publication Date:
August 13, 1986
Filing Date:
February 06, 1985
Export Citation:
Assignee:
NEC CORP
International Classes:
H01L21/3205; H01L21/66; H01L21/822; H01L23/52; H01L27/04; (IPC1-7): H01L21/88
Attorney, Agent or Firm:
Uchihara Shin