Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS61261900
Kind Code:
A
Abstract:
PURPOSE: To execute easily the effective test of an EPROM by providing a mask ROM to store an EPROM and a program for a test in the same chip.
CONSTITUTION: An EPROM 11 and a mask ROM 12 are arranged in the same chip, the chip is connected to a micro processor 13, the enable signal is supplied from a terminal 16, the ROM 12 is made active and then, based upon the test program stored at the ROM 12, the EPROM 11 is tested. Consequently, it is not necessary to connect the large-sized tester and the test of the EPROM can be easily executed effectively.
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Inventors:
MORITA NOBUNARI
KANAMARU KENJI
TSUTSUI TORU
KANAMARU KENJI
TSUTSUI TORU
Application Number:
JP10341585A
Publication Date:
November 19, 1986
Filing Date:
May 15, 1985
Export Citation:
Assignee:
NIPPON DENSO CO
International Classes:
G11C29/00; G11C29/02; G01R31/26; (IPC1-7): G01R31/26; G11C29/00
Attorney, Agent or Firm:
Takehiko Suzue