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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JPH05144944
Kind Code:
A
Abstract:

PURPOSE: To improve freedom of circuit arrangement and wiring by forming a protective film wherein a window is provided to expose a plurality of pads and by electrically connecting the plurality of pads mutually via an upper part of the protective film.

CONSTITUTION: A first pad 11 is arranged near a peripheral edge 10 of a semiconductor chip, an input/output buffer circuit 12 is connected thereto and a second pad 13 is arranged in the inside circuit side to be connected to the input/ output buffer circuit 12. A third pad 14 is arranged in a position apart from the second pad 13 in the inside circuit and is connected to a logical circuit. In order to expose pads 11, 13, 14, a window is formed in a protecting film which corresponds to the regions and the second pad 13 and the third pad 14 are connected mutually by a bonding wire. Thereby, freedom of circuit arrangement and wiring can be improved.


Inventors:
KUGISHIMA MASAHIRO
Application Number:
JP21708891A
Publication Date:
June 11, 1993
Filing Date:
August 28, 1991
Export Citation:
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Assignee:
KAWASAKI STEEL CO
International Classes:
H01L21/66; H01L21/82; H01L21/822; H01L27/04; (IPC1-7): H01L21/66; H01L21/82; H01L27/04
Attorney, Agent or Firm:
Yoshio Kosugi (1 person outside)



 
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