Title:
半導体集積回路、映像信号出力回路
Document Type and Number:
Japanese Patent JP5169861
Kind Code:
B2
Abstract:
In a semiconductor integrated circuit arranged to perform sag compensation for a video signal, an operational amplifier includes a non-inverted input terminal, an inverted input terminal, and an output terminal, in which a video signal is input to the non-inverted input terminal. A first resistor includes a first end connected to the inverted input terminal and a second end being grounded. The output terminal is connected to a first external terminal and the inverted input terminal is connected to a second external terminal. A second resistor includes a first end connected to the output terminal and a second end connected to the inverted input terminal. A first capacitor is disposed between the first external terminal and the second external terminal and connected in parallel to the second resistor, and the second resistor has a resistance value determined based on a capacitance value of the first capacitor.
Inventors:
Shuhei Abe
Tsuchihashi
Yoshiaki Hirano
Tsuchihashi
Yoshiaki Hirano
Application Number:
JP2009008912A
Publication Date:
March 27, 2013
Filing Date:
January 19, 2009
Export Citation:
Assignee:
MITSUMI ELECTRIC CO.,LTD.
International Classes:
H04N5/14; H03F1/32; H03F1/34; H03F1/48
Domestic Patent References:
| JP1221005A | ||||
| JP58173918U | ||||
| JP5121959A | ||||
| JP9107256A | ||||
| JP2005184056A | ||||
| JP2004274434A |
Attorney, Agent or Firm:
Tadahiko Ito