PURPOSE: To attain the free adjustment of delay for correction of the data and clock skews.

CONSTITUTION: In a semiconductor integrated circuit consisting of the function blocks or basic logical cells connected together via an inter-cell wiring 33, the terminal 30 and 31 which perform the input/output of data to the outside of the function block or the basic logical cell are provided with the delay adjustment means which adjust the delay through adjustment of the resistance value. Then every delay adjustment means consists of the wiring 33, a delay adjustment wiring 32 which is provided on a wiring layer different from the wiring 33, an area where both wirings 33 and 32 are overlapping with each other, and the contacts 34 and 35 which secure the connection between the wirings 33 and 32 in their overlapping area.