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Patent Searching and Data


Title:
VARIABLE CLOCK GENERATION DEVICE
Document Type and Number:
Japanese Patent JPH08272479
Kind Code:
A
Abstract:

PURPOSE: To suppress increase of the current consumption of a power supply without deteriorating the overall system performance.

CONSTITUTION: A variable clock generation device supplies the clocks to the units 31 and 32 which operate by a high speed clock CLK0 or a low speed clock CLK1. Then the generation circuit is provided with a signal switch circuit (dividing action decision circuit) 10 which produces a switch signal Act to switch the clock frequency when a prescribed order (processing start/end) is received, and a variable clock supply circuit 20 which supplies the clock CLK0 to the unit 31 and also the clock CLK1 to the unit 32 respectively in a 1st operating environment (highest priority circuit operation) that is decided by the contents of the instruction and the signal Act and then supplies the clocks CLKO to both circuits 31 and 32 in a 2nd operating environment (highest priority circuit non-operation) that is decided by the contents of the instruction and the signal Act.


Inventors:
SASAKI YASUKI
Application Number:
JP7585595A
Publication Date:
October 18, 1996
Filing Date:
March 31, 1995
Export Citation:
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Assignee:
NIPPON KOKAN KK
International Classes:
G06F1/04; G06F1/08; H03K3/02; H03K23/64; (IPC1-7): G06F1/08; G06F1/04; H03K3/02; H03K23/64
Attorney, Agent or Firm:
長谷川 和音