Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP3805662
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit having a wiring structure suitable for an analog-digital hybrid LSI.
SOLUTION: As shown in Figure 2 (a), wiring under a power supply line 31a opposed to the power supply line 1 through an insulation film is provided under the power supply line 1 and connected with a substrate ground wire 12 through wiring 31. The wiring under the power supply line 31a is formed by using the lower wiring layer the same as the wiring 31. Moreover, as shown in figure 2 (b), the wiring under the ground wire 31b opposed to the ground wire 2 through the insulation film is provided under the ground wire 2 and connected with a substrate power supply line 11 through the wiring 31. The wiring under the ground wire 31b is formed by using the lower wiring layer the same as the wiring 31 and the wiring under the power supply line 31a. Thereby, the capacitor between the wiring C45a and C45b are formed as shown in Figures 2 (a) and (b).
Inventors:
Noriko Shinomiya
Application Number:
JP2001332526A
Publication Date:
August 02, 2006
Filing Date:
October 30, 2001
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H01L27/04; H01L21/82; H01L21/822; H01L21/8238; H01L27/092; H01L27/118; (IPC1-7): H01L21/822; H01L21/82; H01L21/8238; H01L27/04; H01L27/092; H01L27/118
Domestic Patent References:
JP9045860A | ||||
JP2001015601A | ||||
JP2001230376A | ||||
JP2000195254A | ||||
JP2001068552A | ||||
JP7297188A | ||||
JP2000332118A | ||||
JP2000208713A |
Attorney, Agent or Firm:
Hiroshi Maeda
Hiroshi Koyama
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Teshima Masaru
Atsushi Fujita
Hiroshi Koyama
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Teshima Masaru
Atsushi Fujita