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Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH0774318
Kind Code:
A
Abstract:

PURPOSE: To conduct the selection of a test mode in a stable manner even when there is irregularity in the manufacture of a semiconductor integrated circuit with a built-in test mode selection circuit with which an internal circuit is set in a test mode by detecting the application of prescribed voltage higher than the voltage applied to the prescribed external terminal in the normal operation mode.

CONSTITUTION: The threshold voltage of a test mode selection circuit 38 is formed as VTH-TEST=R40 (resistance value of resistor 40)/R41 (resistance value of resistor 41).1/2.V (threshold voltage of inverter 42) + VCC (base voltage of PNP transistor 39) +0.8 (threshold voltage of PNP transistor 39), and the variation of the VTH-TEST due to irregularity of manufacture is prevented.


Inventors:
MATSUZAKI YASURO
Application Number:
JP22036993A
Publication Date:
March 17, 1995
Filing Date:
September 06, 1993
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G11C7/00; G11C29/00; G11C29/02; H01L21/66; G11C29/46; G11C29/56; H01L21/822; H01L27/04; H01L27/11; (IPC1-7): H01L27/04; H01L21/822; H01L21/66
Attorney, Agent or Firm:
Tetsuo Hirado