Title:
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR CONFIRMING STATE OF CAPACITY FUSE
Document Type and Number:
Japanese Patent JP3730932
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To improve reliability by making voltage applied to a capacity fuse approximately same as voltage applied to a memory cell when it is detected whether a capacity fuse is fused or not.
SOLUTION: When it is detected whether the capacity fuse 10 is fused or not, voltage HVCCF (0.7 V) being voltage of half of a power source voltage VINTS (1.4 V) for driving a sense amplifier 18 is charged to the capacity fuse 10 and latched by a latch circuit section 19, after potential difference between voltage stored in the capacity fuse 10 and voltage (0.5 V) lower than the HVCCF is amplified by the sense amplifier 18. As only the voltage HVCCF (0.7 V) being same voltage as voltage applied to a normal memory cell is applied between both electrodes of the capacity fuse 10, reliability of a semiconductor memory device is improved.
Inventors:
Yasuhiro Namba
Application Number:
JP2002113322A
Publication Date:
January 05, 2006
Filing Date:
April 16, 2002
Export Citation:
Assignee:
Elpida Memory Co., Ltd.
International Classes:
G11C29/04; H01L21/822; G11C7/20; G11C11/4072; G11C17/18; G11C29/02; H01L21/82; H01L21/8242; H01L27/04; H01L27/108; (IPC1-7): G11C29/00; H01L21/82; H01L21/822; H01L21/8242; H01L27/04; H01L27/108
Domestic Patent References:
| JP9097499A | ||||
| JP2000133717A | ||||
| JP2000500901A | ||||
| JP2000132992A |
Attorney, Agent or Firm:
Akio Miyazaki
Shinichi Iwata
Masaaki Ogata
Ishibashi Masayuki
Shinichi Iwata
Masaaki Ogata
Ishibashi Masayuki