SEMICONDUCTOR MEMORY DEVICE AND METHOD - SONY SEMICONDUCTOR SOLUTIONS CORP

Title:

SEMICONDUCTOR MEMORY DEVICE AND METHOD

Document Type and Number:

Japanese Patent JP2023091180

Kind Code:

A

Abstract:

To suppress decrease in area efficiency.SOLUTION: The semiconductor memory device includes: a regular cell array containing a plurality of regular cells each being a non-volatile memory cell: and a plurality of dummy cells each of which is a non-volatile memory cell and which is arranged in at least a part of the peripheral region of the regular cell array. Information about the semiconductor memory device is written to at least some of the plurality of dummy cells.SELECTED DRAWING: Figure 1

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Inventors:

SHIMADA MANABU
TAMURA ATSUSHI

Application Number:

JP2021205789A

Publication Date:

June 30, 2023

Filing Date:

December 20, 2021

Export Citation:

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Assignee:

SONY SEMICONDUCTOR SOLUTIONS CORP

International Classes:

G01R31/28; G11C29/00

Attorney, Agent or Firm:

Sakai International Patent Office

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