Title:
SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JPH11260057
Kind Code:
A
Abstract:
To provide a semiconductor memory device which has a data amplifier whose current consumption is reduced by a method wherein a dynamic data amplifier and a data holding unit are provided.
After complementary data lines GIOT and GION are activated, data of the complementary data lines GIOT and GION are amplified by a data amplifier 5 and outputted to data lines D2N and D2T and the outputted data are held by a data holding part 6. At that time, if error data are outputted to the data lines D2N and D2T, in order not to hold the error data, the timing of the data holding part 6 is delayed. When the data are held, a data holding determination signal A is outputted to stop the operation of the data amplifier 5.
Inventors:
NAGATA KYOICHI
Application Number:
JP6263698A
Publication Date:
September 24, 1999
Filing Date:
March 13, 1998
Export Citation:
Assignee:
NEC CORP
International Classes:
G11C11/417; G11C7/10; G11C11/409; (IPC1-7): G11C11/409; G11C11/417
Attorney, Agent or Firm:
Yoshiyuki Iwasa