PURPOSE: To improve reproducibility, and to facilitate manufacture by selectively forming a capacitance in an electrode contact window for a source or a drain, increasing the degree of integration of a ROM while breaking an insulating film and forming extremely simple structure determining the presence of memory.

CONSTITUTION: Gates 5G, 5G' are extended and formed 11, 11' in the lateral direction among the sources and drains of each memory cell, doped polycrystalline silicon 12, 12' are formed or non-doped polycrystalline silicon are formed to the contact window sections 13, 13' of layers such as drain diffusion layers 5D, 5D' of one memory cells 10, 10', and ions are doped through ion implantation, etc. to form oxide films. The states of 0 or 1 are displayed by breaking the capacitance or leaving it as it is according to a breaking or a non-breaking of the insulating films 14, 14' consisting of the oxide films by applying voltage among the insulating films 14, 14' and a substrate 7. The gate extending sections 11, 11' function as word lines 15, 15', and bit lines 16 in Al, etc. are formed along the lateral direction of active regions 9. The word line 15 is selected, a VSS line 17 is grounded while withstand voltage is applied to the bit lines 16, thus bringing the insulating film 14 formed to a contact section on the drain diffusion layer 5D to a conductive state, then writing data.