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Patent Searching and Data


Title:
SEMICONDUCTOR MEMORY
Document Type and Number:
Japanese Patent JPH08339684
Kind Code:
A
Abstract:

To reduce the power consumption of a semiconductor memory by eliminating the need of a boosting circuit and a high-voltage generating circuit for driving word lines by obtaining a word line driving voltage by supplying an external power supply voltage to a word line driver.

When a prescribed row address is transmitted from a row address buffer, a row address decoder 2 decodes the row address and one word line WL is selected out of a large number of word lines in accordance with the decoded row address. An external power supply voltage is supplied to an internal power supply voltage generating circuit 8 and a word line driver 4 and the circuit converts the supplied voltage into an external power supply voltage and outputs the external power supply voltage to an internal circuit. The word line driver 4 which receives the external power supply voltage transmits the inputted external power supply voltage to the selected work line WL in accordance with the output of the decoder 2.


Inventors:
IWAI KATSUAKI
CHO HIDEHITO
Application Number:
JP12145396A
Publication Date:
December 24, 1996
Filing Date:
May 16, 1996
Export Citation:
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Assignee:
SAMSUNG ELECTRONIC
International Classes:
G11C11/413; G11C5/14; G11C11/407; (IPC1-7): G11C11/407; G11C11/413
Domestic Patent References:
JPS62178013A1987-08-05
Attorney, Agent or Firm:
Takeshi Takatsuki