PURPOSE: To obtain a non-volatile RAM by forming two electrodes capacitively coupled with a floating gate of a reverse conductivity type high density impurity layer formed in an Si substrate in a capacity having a floating electrode structure of a memory cell.
CONSTITUTION: A P-type Si substrate 28 is separated by a thick oxide film 29 to form N+ type layers 30, 31 by As ion implanting, and a floating gate is formed by a polysilicon 33 through a thin oxide film 32 to form a capacity C1. Since an area between the layer 31 and the gate is larger than that between the layer 30 and the gate in this case, if a voltage is applied between the layers 30 and 31, a higher voltage is applied between the layer 30 and the gate. Thus, the layer 30 is substituted for the oxide film between the gates, and the layer 31 operates as a control gate. According to this configuration, a non-volatile RAM which has matching property with a process of a gate array, a micro processor, etc., can be obtained by a short process.
WADA MASASHI