PURPOSE: To enable the control of the lower and upper limit values of the threshold voltage value corresponding to memory information by a method wherein the second region of a nonvolatile memory transistor channel is put in parallel with a channel region, having a high impurity concentration of the same conductivity type as that of a semiconductor substrate, and covered with a charge accumulated region.

CONSTITUTION: After field oxide films 2 are selectively formed on the surface of the Si substrate 1, a gate oxide film 5 is formed, and then the surface of the substrate 1 is selectively exposed by removal of desired parts. The first high impurity concentration region of P-conductivity type is formed in the surface of the substrate 1 at the active region where no Si thin film 4 remains, and the second one 17 of P type conductivity type in the surface of the substrate at the active region. After an Si thin film is reduced in resistance, a control gate is formed by etching in such a manner that a floating gate 4 and the first and second region 17 are covered. A transistor 14 at the region covered with the floating gate is modified in the threshold voltage value to an arbitrary value according to the rewrite pulse conditions.