To prevent an erroneous readout and a leakage current from being generated even when a read-out column selection gate is turned ON at the time of writing data in the DRAM of a direct sense system which has I/O(input/ output) separation constitution.

A common line CL which is to be connected to sources of transistors constituting read gates in common is arranged in a sense amplifier area 18. A voltage control circuit 24 is arranged in the intersection area 26 of the sense amplifier area 18 and a subdecoder area 20. Then, the voltage control circuit 24 supplies a grounding voltage to the common line CL at the time of reading out data and supplies a voltage higher than the grounding voltage to the line CL at the time of writing data.