PURPOSE: To subject chips on a wafer to measurement and burn-in by using a test substrate having a specific thermal expansion coefficient.
CONSTITUTION: A testing substrate 2 has the thermal expansion coefficient of 13×10-4°C or less, the substrate is made of silicon, which is same as the wafer 1 to be tested, and its back side is roughened by a glass substrate 13. On the testing substrate 2, a pad 4 is formed on the position corresponding to the pad 3 of the wafer 1, and a power source wire 7, a grounding wire 8, a chip selection wire 10 and the like are formed. The testing substrate 2, with the glass substrate 13 facing upward, is superposed on the wafer 1 to be tested, they are placed on a stage 14, and they are vacuum-chucked. At that point, the warpage of the wafer 1 to be tested is removed, and the pads 3 and 4 are conducted through the intermediary of an anisotropic conductive film 5. Then, the specific chip of the wafer to be tested is activated by an external signal, and output power is obtained.
HISHII TOSHISUKE
NAKAIZUMI KAZUO
| JPH06140483A | 1994-05-20 |
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