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Title:
SEPARATOR CIRCUIT FOR SYNCHRONIZING SIGNAL
Document Type and Number:
Japanese Patent JPS5534382
Kind Code:
A
Abstract:

PURPOSE: To make it possible to separate accurately a synchronizing signal from a composite video signal, etc., by using a fixed reference detection signal and LPF for noise removal.

CONSTITUTION: Composite video signal (a) is clamped by clamping circuit 7 to decrease its pedestal level down to zero V, and then suplied to FETQ2. Signal (a), on the other hand, is passed through conventional synchronous separator circuit 2, etc., to generate a sampling pulse of a sink-chip level, which is applied to the gate of FETQ2. Then, the potential of the sink chip of signal (a) is sampled, its output is supplied to LPF10 to remove a high-frequency component and the voltage of it is divided at a fixed ratio, so that a reference detection signal within ranges of the sink chip level and pedestal level of signal (a) will be obtained. Next, operational amplifier 12 compares signal (a) with the above-mentioned reference signal to separate a horizontal synchronizing signal. In this way, the stable reference signal and LPF for noise removal are used to make it possible to separate the synchronizing signal accurately.


Inventors:
HIRAKURI SEISUKE
UCHIUMI TAKU
Application Number:
JP10840478A
Publication Date:
March 10, 1980
Filing Date:
September 04, 1978
Export Citation:
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Assignee:
VICTOR COMPANY OF JAPAN
International Classes:
H04N5/08; G11B5/09; G11B20/16; H04B14/04; H04N5/93; (IPC1-7): G11B5/09; H04B12/02; H04N5/08; H04N5/93



 
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